2022-11-07 11:08:56 +00:00
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from .bus import Bus as IBus
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from .lr import LR as ILR
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from .rtn import AuxRtn as IAuxRtn
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from .rtn import FxRtn as IFxRtn
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class Bus(IBus):
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@property
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def address(self):
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return f"/bus/{str(self.index).zfill(2)}"
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class AuxRtn(IAuxRtn):
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@property
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def address(self):
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return f"/auxin/{str(self.index).zfill(2)}"
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class FxRtn(IFxRtn):
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@property
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def address(self):
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return f"/fxrtn/{str(self.index).zfill(2)}"
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class MainStereo(ILR):
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@property
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def address(self) -> str:
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2024-02-14 22:06:28 +00:00
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return "/main/st"
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2022-11-07 11:08:56 +00:00
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class MainMono(ILR):
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@property
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def address(self) -> str:
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2024-02-14 22:06:28 +00:00
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return "/main/m"
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2022-11-07 11:08:56 +00:00
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class Matrix(ILR):
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@property
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def address(self) -> str:
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return f"/mtx/{str(self.index).zfill(2)}"
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